ENTITY ram_sense_decad3 IS
PORT (
  ad3  	   : in  BIT;
  ad4  	   : in  BIT;
  ad5  	   : in  BIT;
  ad3x     : out  BIT;
  nad3x    : out  BIT;
  ad4x     : out  BIT;
  nad4x    : out  BIT;
  ad5x     : out  BIT;
  nad5x    : out  BIT;
  vdd  	   : in  BIT;
  vss	   : in  BIT
);
END ram_sense_decad3;

ARCHITECTURE VBE OF ram_sense_decad3 IS

BEGIN
  ASSERT (vdd and not (vss))
  REPORT "power supply is missing on ram_sense_decad3"
  SEVERITY WARNING;

END;
