ENTITY rf_dec_bufad0 IS
PORT (
  i      : in  BIT;
  nq  	 : inout BIT;
  q  	 : out BIT;
  vdd	 : in  BIT;
  vss	 : in  BIT
);
END rf_dec_bufad0;

ARCHITECTURE VBE OF rf_dec_bufad0 IS

BEGIN
  ASSERT (vdd and not (vss))
  REPORT "power supply is missing on rf_dec_bufad0"
  SEVERITY WARNING;

  nq <= not i;
  q  <= not nq;

END;
