# Firmware configuration file.
#
# Global limits (some are hardware limits, others are due to the firmware).
# nvi = 128		virtual interfaces
# niqflint = 1023	ingress queues with freelists and/or interrupts
# nethctrl = 64K	Ethernet or ctrl egress queues
# neq = 64K		egress queues of all kinds, including freelists
# nexactf = 336		MPS TCAM entries, can oversubscribe.
#

[global]
	rss_glb_config_mode = basicvirtual
	rss_glb_config_options = tnlmapen,hashtoeplitz,tnlalllkp

	sge_timer_value = 1, 5, 10, 50, 100, 200	# usecs

	# enable TP_OUT_CONFIG.IPIDSPLITMODE
	reg[0x7d04] = 0x00010000/0x00010000

	# disable TP_PARA_REG3.RxFragEn
	reg[0x7d6c] = 0x00000000/0x00007000

	reg[0x7dc0] = 0x0e2f8849		# TP_SHIFT_CNT

	filterMode = fragmentation, mpshittype, protocol, vlan, port, fcoe
	filterMask = protocol, fcoe

	tp_pmrx = 36, 512
	tp_pmrx_pagesize = 64K

	# TP number of RX channels (0 = auto)
	tp_nrxch = 0

	tp_pmtx = 46, 512
	tp_pmtx_pagesize = 64K

	# TP number of TX channels (0 = auto)
	tp_ntxch = 0

	# TP OFLD MTUs
	tp_mtus = 88, 256, 512, 576, 808, 1024, 1280, 1488, 1500, 2002, 2048, 4096, 4352, 8192, 9000, 9600

	# cluster, lan, or wan.
	tp_tcptuning = lan

# PFs 0-3.  These get 8 MSI/8 MSI-X vectors each.  VFs are supported by
# these 4 PFs only.
[function "0"]
	wx_caps = all
	r_caps = all
	nvi = 1
	rssnvi = 0
	niqflint = 2
	nethctrl = 2
	neq = 4
	nexactf = 2
	cmask = all
	pmask = 0x1

[function "1"]
	wx_caps = all
	r_caps = all
	nvi = 1
	rssnvi = 0
	niqflint = 2
	nethctrl = 2
	neq = 4
	nexactf = 2
	cmask = all
	pmask = 0x2

[function "2"]
	wx_caps = all
	r_caps = all
	nvi = 1
	rssnvi = 0
	niqflint = 2
	nethctrl = 2
	neq = 4
	nexactf = 2
	cmask = all
	pmask = 0x4

[function "3"]
	wx_caps = all
	r_caps = all
	nvi = 1
	rssnvi = 0
	niqflint = 2
	nethctrl = 2
	neq = 4
	nexactf = 2
	cmask = all
	pmask = 0x8

# PF4 is the resource-rich PF that the bus/nexus driver attaches to.
# It gets 32 MSI/128 MSI-X vectors.
[function "4"]
	wx_caps = all
	r_caps = all
	nvi = 32
	rssnvi = 16
	niqflint = 512
	nethctrl = 1024
	neq = 2048
	nexactf = 280
	cmask = all
	pmask = all
	nethofld = 2048

	# driver will mask off features it won't use
	protocol = ofld, rddp, rdmac, iscsi_initiator_pdu, iscsi_target_pdu

	tp_l2t = 4096
	tp_ddp = 2
	tp_ddp_iscsi = 2
	tp_stag = 2
	tp_pbl = 5
	tp_rq = 7

	# TCAM has 8K cells; each region must start at a multiple of 128 cell.
	# Each entry in these categories takes 4 cells each.  nhash will use the
	# TCAM iff there is room left (that is, the rest don't add up to 2048).
	nroute = 32
	nclip = 32
	nfilter = 1456
	nserver = 512
	nhash = 16384

# PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors.
# Not used right now.
[function "5"]
	nvi = 1
	rssnvi = 0

# PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors.
# Not used right now.
[function "6"]
	nvi = 1
	rssnvi = 0

# The following function, 1023, is not an actual PCIE function but is used to
# configure and reserve firmware internal resources that come from the global
# resource pool.
[function "1023"]
	wx_caps = all
	r_caps = all
	nvi = 4
	rssnvi = 0
	cmask = all
	pmask = all
	nexactf = 8
	nfilter = 16

# For Virtual functions, we only allow NIC functionality and we only allow
# access to one port (1 << PF).  Note that because of limitations in the
# Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL
# and GTS registers, the number of Ingress and Egress Queues must be a power
# of 2.
#
[function "0/*"]
	wx_caps = 0x82
	r_caps = 0x86
	nvi = 1
	rssnvi = 0
	niqflint = 2
	nethctrl = 2
	neq = 4
	nexactf = 2
	cmask = all
	pmask = 0x1

[function "1/*"]
	wx_caps = 0x82
	r_caps = 0x86
	nvi = 1
	rssnvi = 0
	niqflint = 2
	nethctrl = 2
	neq = 4
	nexactf = 2
	cmask = all
	pmask = 0x2

[function "2/*"]
	wx_caps = 0x82
	r_caps = 0x86
	nvi = 1
	rssnvi = 0
	niqflint = 2
	nethctrl = 2
	neq = 4
	nexactf = 2
	cmask = all
	pmask = 0x4

[function "3/*"]
	wx_caps = 0x82
	r_caps = 0x86
	nvi = 1
	rssnvi = 0
	niqflint = 2
	nethctrl = 2
	neq = 4
	nexactf = 2
	cmask = all
	pmask = 0x8

# MPS has 192K buffer space for ingress packets from the wire as well as
# loopback path of the L2 switch.
[port "0"]
	dcb = none
	bg_mem = 25
	lpbk_mem = 25
	hwm = 30
	lwm = 15
	dwm = 30

[port "1"]
	dcb = none
	bg_mem = 25
	lpbk_mem = 25
	hwm = 30
	lwm = 15
	dwm = 30

[port "2"]
	dcb = none
	bg_mem = 25
	lpbk_mem = 25
	hwm = 30
	lwm = 15
	dwm = 30

[port "3"]
	dcb = none
	bg_mem = 25
	lpbk_mem = 25
	hwm = 30
	lwm = 15
	dwm = 30

[fini]
	version = 0x1
	checksum = 0x3ecbe8a0
#
#
